pjsms05c series penta tvs/zener array for esd and latch-up protection specification features applications maximum ratings (per device) rating symbol value units this 5 tvs/zener array family have been designed to protect sensitive equipment against esd and to prevent latch-up events in cmos circuitry operating at 5v, 12v, 15v and 24v. this tvs array offers an integrated solution to protect up to 5 data lines where the board space is a premium. 350w power dissipation (8/20s waveform) low leakage current, maximum of 5a at rated voltage iec61000-4-2 esd 20kv air, 15kv contact compliance very low clamping voltage personal digital assistant (pda) sim card port protection (mobile phone) portable instrumentation mobile phones and accessories electrical characteristics (per device) tj = 25c parameter symbol min unit s conditions typical max reverse stand-off voltage reverse breakdown voltage reverse leakage current clamping voltage (8/20s) clamping voltage (8/20s) off state junction capacitance off state junction capacitance v wrm v br i r c v v c cj cj br i = r v = i = pp i = pp 0 vdc bias f = 1mhz between i/o pins and pin 2 5 vdc bias f = 1mhz between i/o pins and pin 2 5v 6v a 5 9.5 v 13 v 200 pf pf 110 1ma 5v 5a 24a 350 >25 -50 to +125 -50 to +150 w kv c c peak pulse power (8/20s waveform) esd voltage (hbm) operating temperature range p pp v esd t j t stg 1/13/2009 page 1 www.panjit.com industry standard surface mount package sot23-6l memory card port protection 1 sot23-6l pjsms05c storage temperature range 123 6 54 123 6 54 100% tin matte finish (rohs compliant) device marking code pjsms05c md5 pjsms12c ma2 pjsms15c ma5 pjsms24c mb4
www.panjit.com pjsms05c series 1/13/2009 page 2 electrical characteristics (per device) tj = 25c parameter symbol min unit s conditions typical max reverse stand-off voltage reverse breakdown voltage reverse leakage current clamping voltage (8/20s) clamping voltage (8/20s) off state junction capacitance v wrm v br i r c v v c cj br i = r v = i = pp i = pp 0 vdc bias f = 1mhz between i/o pins and pin 2 12 v 13.3 v a 5 17 v 21 v 90 pf 1ma 12v 5a 15a pjsms12c parameter symbol min unit s conditions typical max reverse stand-off voltage reverse breakdown voltage reverse leakage current clamping voltage (8/20s) clamping voltage (8/20s) off state junction capacitance v wrm v br i r c v v c cj br i = r v = i = pp i = pp 0 vdc bias f = 1mhz between i/o pins and pin 2 15 v 16.7 v a 5 22 v 27 v 70 pf 1ma 15v 5a 12a pjsms15c parameter symbol min unit s conditions typical max reverse stand-off voltage reverse breakdown voltage reverse leakage current clamping voltage (8/20s) clamping voltage (8/20s) off state junction capacitance v wrm v br i r c v v c cj br i = r v = i = pp i = pp 0 vdc bias f = 1mhz between i/o pins and pin 2 24 v 26.7 v a 5 35 v 40 v 50 pf 1ma 24v 5a 8a pjsms24c
off-state capacitance per device - 1mhz 0 20 40 60 80 100 120 140 160 180 200 012345 bi as , v d c capacitance, pf pjsm s0 5 pjsm s12 pjsm s15 pjsm s2 4 1 /1 3 /200 9 page 3 www.panjit.com typical characteristics tj = 25c unless otherwise noted pjsms05c series pulse waveform 0 10 20 30 40 50 60 70 80 90 100 110 0 5 10 15 20 25 30 time, sec percent of ipp 50% of ipp @ 20s rise time 10-90% - 8s non- re pe t i t ive pe ak puls e pow e r vs puls e time 0.01 0.1 1 10 100 1000 1 10 100 1000 pulse duration, sec peak pulse power - ppp (w) clamping voltage vs. peak current 0 5 10 15 20 25 30 35 40 45 0 5 10 15 20 25 30 ipp, a (8/20sec) clamping voltage, v pjsms05 pjsms12 pjsms15 pjsms24 surge pulse waveform definition pjsms24c pjsms15c pjsms12c pjsms05c pjsms24c pjsms15c pjsms12c pjsms05c
pjsms05c series 1/13/2009 page 4 www.panjit.com package and pad layout dimensions ? c opyright panjit international, inc 2009 the information presented in this document is believed to be accurate and reliable. the specifications and information herein a re subject to change without notice. pan jit makes no warranty, representation or guarantee regarding the suitability of its produ cts for any particular purpose. pan jit products are not authorized for use in life support devices or systems. pan jit does not convey any license under its patent rights or rights of others.
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